In the development of an advanced CMOS (complementary MOS) device where transistors have been increasingly miniaturized, the degradation of drive currents due to the depletion of a polysilicon (poly-Si) electrode has become an issue. Hence, a study is being made of a technique to prevent drive current degradation by applying a metal gate electrode and thereby avoiding electrode depletion.
As a material to be used for the metal gate electrode, pure metals, metal nitrides, silicide materials and the like are under study. In any case of these materials, however, the threshold voltages (Vth) of an N-channel MOSFET (hereinafter referred to as the “nMOS”) and a P-channel MOSFET (hereinafter referred to as the “pMOS”) must be settable to correct values.
In the case of a high-performance CMOS transistor, the Vth needs to be set to approximately ±0.1 eV. Accordingly, a material having a work function not higher than the work function (4.0 eV) of n-type polysilicon needs to be used for the gate electrode of the nMOS. In addition, a material having a work function not lower than the work function (5.2 eV) of p-type polysilicon needs to be used for the gate electrode of the pMOS.
As means for realizing these objectives, there has been proposed a method for controlling the Vth of a transistor by selectively using dissimilar metals or alloys having different work functions for the gate electrodes of the nMOS and the pMOS (dual-metal gate technology).
For example, non-patent document 1 (International Electron Devices Meeting Technical Digest 2002, p. 359) describes that the work functions of Ta and Ru formed on SiO2 are 4.15 eV and 4.95 eV, respectively, and therefore a work function modulation of 0.8 eV is possible between these two electrodes.
On the other hand, a technique related to a full-silicide electrode in which a polysilicon electrode is completely silicided with Ni, Hf, W or the like has been a focus of attention recently.
For example, patent document 1 (US 2005/0070062-A) discloses that the consistency of a formation process with a conventional CMOS process is increased by using SiO2 for a gate insulating film and by using a silicide electrode obtained by completely siliciding polysilicon implanted with an impurity, such as P or B, as a gate electrode, and discloses that threshold voltage can be controlled by doping an impurity into yet-to-be-silicided polysilicon on SiO2.
For this reason, the full-silicide electrode is considered to be a promising metal gate. In threshold control based on doping in particular, effective work functions of approximately 4.2 to 4.4 eV and 4.7 to 4.9 eV have been obtained for the nMOS and pMOS, respectively, when impurities (B, Al, Ga, In or TI for the pMOS and N, P, As, Sb or Bi for the nMOS) used in a conventional semiconductor process are used. Such a threshold change as described above is caused as a result of the above-described doped impurities being segregated on a silicide electrode/SiO2 gate insulating film boundary at the time of silicidation due to a so-called “snowplow” effect. Doping-based threshold control enables the selective fabrication of the pMOS and nMOS and is, therefore, considered promising as a method for controlling the threshold of a transistor using SiO2 as the gate insulating film thereof.
In addition, in the technique described in patent document 2 (JP 2005-129551-A), effective work functions of approximately 4.1 eV and 5.1 eV have been obtained, respectively, for the nMOS when the Ni composition of the gate electrode thereof is 30 to 60% and contains an n-type impurity and for the pMOS when the Ni composition of the gate electrode thereof is 40 to 70% and contains a p-type impurity.
However, the above-described techniques respectively have had the below-described problems.
The dual-metal gate technology to selectively fabricate dissimilar metals or alloys having different work functions, requires a process of etching away a metal layer deposited on either one of the gate insulating films of the pMOS and nMOS. The process deteriorates the quality of the gate insulating film at the time of the etching, thus causing the characteristics and reliability of elements to degrade.
In a case where an NiSi electrode (nickel monosilicide electrode) obtained by completely siliciding a polysilicon electrode implanted with an impurity, such as P or B, is applied as a gate electrode on an SiO2 gate insulating film, the effective work functions obtained for the nMOS and pMOS are approximately 4.2 to 4.4 eV and 4.7 to 4.9 eV, respectively, as described above. In order to materialize a high-performance transistor, however, it is necessary to realize even lower thresholds by controlling the effective work functions.
In patent document 2, effective work functions of approximately 4.1 eV and 5.1 eV have been obtained, respectively, for the nMOS when the Ni composition of the gate electrode thereof is 30 to 60% and contains an n-type impurity and for the pMOS when the Ni composition of the gate electrode thereof is 40 to 60% and contains a p-type impurity. However, there has not been found out any Ni silicide electrode having effective work functions (4.0 eV for the nMOS and 5.2 eV for the PMOS) wherewith thresholds required of a high-performance nMOS and pMOS can be realized in these composition ranges.
If the Ni composition of the gate electrode is 40% or higher, the adhesion of the gate electrode to the SiO2 gate insulating film is extremely low. Therefore, separation is liable to take place in a gate electrode/insulating film boundary. As a result, element performance is likely to degrade. In addition, it is known that if the Ni composition of the gate electrode is 40% or higher, an electrode-induced compressive stress is applied to the gate insulating film, thus degrading the reliability of the gate insulating film (International Electron Devices Meeting Technical Digest 2005, p. 709). From the above-described points of view, it is preferable that the Ni composition of the gate electrode is lower than 40%. However, there has not been found out any Ni silicide electrode wherewith a threshold required of a high-performance pMOS can be realized in this composition range.
When fabricating a CMOS device, it is preferable that the silicide electrodes of both the nMOS and pMOS can be formed in one step of silicidation, in order to reduce costs through simplified steps. To that end, the compositions of the Ni full-silicide electrodes of the nMOS and pMOS need to be the same. However, there have not been found out any Ni silicide electrodes having effective work functions (4.0 eV for the nMOS and 5.2 eV for the pMOS) wherewith thresholds required of a high-performance CMOS device can be realized, whereas silicides composing the nMOS and pMOS gate electrodes are the same in composition.
Along with the miniaturization of elements, there has also been a requirement for controlling a variation in the threshold of a transistor.
In order to form a gate electrode composed of an NiSi2 crystal phase, temperature at the time of heat treatment for silicidation needs to be set higher than 600° C. or 650° C. However, if low-resistance NiSi (nickel monosilicide) is formed in the contact region of a source/drain region, there is the problem that an increase in the resistance value of NiSi is caused by the heat treatment.